Electronic Design

Testbench Automation Tool Provides Tight Links To Verilog Simulation

Faster runtime performance, real-time access to built-in Verilog simulation coverage metrics, and a unified graphical environment for waveform analysis are all ...
EDN

SystemVerilog 3.1 adds assertions and testbench automation

The June 2003 release of SystemVerilog 3.1 integrates testbench automation capabilities and temporal assertions into an enhanced version of Verilog. It eliminates many of Verilog's past limitations, ...
Machine Design

Test Bench Checks HVAC in Electric Vehicles

Automakers need test-bench technology that is fast, flexible and cost-effective. Researchers at Kempten University built such a test bench for ABT e-Line GmbH. It is used to evaluate the capabilities ...
Machine Design

Torque Measurement in Test Benches

Measuring torque, rotational speed, angle of rotation, and the quantities derived from these variables are increasingly critical in the design of new test benches for use in industrial environments.
Electronic Design

Testbench Tool Exploits Distributed Compute Environments

Through an enhancement to inFact, Mentor Graphics’ intelligent testbench automation tool, large simulations can be automatically distributed across up to 1000 CPUs, extending non-redundant sequence ...
EDN

Intelligent testbench begins to coalesce

NEW ORLEANS — Significant steps toward an “intelligent testbench” — a fully automated verification solution — will unfold at next week's Design Automation Conference here, where vendors including ...